260 lines
8.4 KiB
Perl
260 lines
8.4 KiB
Perl
#! /usr/bin/env perl
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# This file is dual-licensed, meaning that you can use it under your
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# choice of either of the following two licenses:
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#
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# Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the Apache License 2.0 (the "License"). You can obtain
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# a copy in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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#
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# or
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#
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# Copyright (c) 2023, Christoph Müllner <christoph.muellner@vrull.eu>
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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use strict;
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use warnings;
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# Set $have_stacktrace to 1 if we have Devel::StackTrace
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my $have_stacktrace = 0;
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if (eval {require Devel::StackTrace;1;}) {
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$have_stacktrace = 1;
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}
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my @regs = map("x$_",(0..31));
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# Mapping from the RISC-V psABI ABI mnemonic names to the register number.
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my @regaliases = ('zero','ra','sp','gp','tp','t0','t1','t2','s0','s1',
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map("a$_",(0..7)),
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map("s$_",(2..11)),
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map("t$_",(3..6))
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);
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my %reglookup;
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@reglookup{@regs} = @regs;
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@reglookup{@regaliases} = @regs;
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# Takes a register name, possibly an alias, and converts it to a register index
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# from 0 to 31
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sub read_reg {
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my $reg = lc shift;
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if (!exists($reglookup{$reg})) {
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my $trace = "";
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if ($have_stacktrace) {
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$trace = Devel::StackTrace->new->as_string;
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}
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die("Unknown register ".$reg."\n".$trace);
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}
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my $regstr = $reglookup{$reg};
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if (!($regstr =~ /^x([0-9]+)$/)) {
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my $trace = "";
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if ($have_stacktrace) {
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$trace = Devel::StackTrace->new->as_string;
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}
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die("Could not process register ".$reg."\n".$trace);
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}
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return $1;
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}
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# Helper functions
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sub brev8_rv64i {
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# brev8 without `brev8` instruction (only in Zbkb)
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# Bit-reverses the first argument and needs two scratch registers
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my $val = shift;
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my $t0 = shift;
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my $t1 = shift;
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my $brev8_const = shift;
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my $seq = <<___;
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la $brev8_const, Lbrev8_const
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ld $t0, 0($brev8_const) # 0xAAAAAAAAAAAAAAAA
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slli $t1, $val, 1
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and $t1, $t1, $t0
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and $val, $val, $t0
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srli $val, $val, 1
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or $val, $t1, $val
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ld $t0, 8($brev8_const) # 0xCCCCCCCCCCCCCCCC
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slli $t1, $val, 2
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and $t1, $t1, $t0
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and $val, $val, $t0
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srli $val, $val, 2
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or $val, $t1, $val
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ld $t0, 16($brev8_const) # 0xF0F0F0F0F0F0F0F0
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slli $t1, $val, 4
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and $t1, $t1, $t0
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and $val, $val, $t0
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srli $val, $val, 4
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or $val, $t1, $val
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___
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return $seq;
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}
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sub sd_rev8_rv64i {
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# rev8 without `rev8` instruction (only in Zbb or Zbkb)
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# Stores the given value byte-reversed and needs one scratch register
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my $val = shift;
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my $addr = shift;
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my $off = shift;
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my $tmp = shift;
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my $off0 = ($off + 0);
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my $off1 = ($off + 1);
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my $off2 = ($off + 2);
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my $off3 = ($off + 3);
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my $off4 = ($off + 4);
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my $off5 = ($off + 5);
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my $off6 = ($off + 6);
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my $off7 = ($off + 7);
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my $seq = <<___;
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sb $val, $off7($addr)
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srli $tmp, $val, 8
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sb $tmp, $off6($addr)
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srli $tmp, $val, 16
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sb $tmp, $off5($addr)
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srli $tmp, $val, 24
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sb $tmp, $off4($addr)
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srli $tmp, $val, 32
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sb $tmp, $off3($addr)
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srli $tmp, $val, 40
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sb $tmp, $off2($addr)
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srli $tmp, $val, 48
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sb $tmp, $off1($addr)
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srli $tmp, $val, 56
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sb $tmp, $off0($addr)
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___
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return $seq;
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}
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# Scalar crypto instructions
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sub aes64ds {
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# Encoding for aes64ds rd, rs1, rs2 instruction on RV64
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# XXXXXXX_ rs2 _ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b0011101_00000_00000_000_00000_0110011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rs2 = read_reg shift;
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return ".word ".($template | ($rs2 << 20) | ($rs1 << 15) | ($rd << 7));
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}
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sub aes64dsm {
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# Encoding for aes64dsm rd, rs1, rs2 instruction on RV64
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# XXXXXXX_ rs2 _ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b0011111_00000_00000_000_00000_0110011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rs2 = read_reg shift;
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return ".word ".($template | ($rs2 << 20) | ($rs1 << 15) | ($rd << 7));
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}
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sub aes64es {
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# Encoding for aes64es rd, rs1, rs2 instruction on RV64
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# XXXXXXX_ rs2 _ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b0011001_00000_00000_000_00000_0110011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rs2 = read_reg shift;
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return ".word ".($template | ($rs2 << 20) | ($rs1 << 15) | ($rd << 7));
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}
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sub aes64esm {
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# Encoding for aes64esm rd, rs1, rs2 instruction on RV64
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# XXXXXXX_ rs2 _ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b0011011_00000_00000_000_00000_0110011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rs2 = read_reg shift;
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return ".word ".($template | ($rs2 << 20) | ($rs1 << 15) | ($rd << 7));
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}
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sub aes64im {
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# Encoding for aes64im rd, rs1 instruction on RV64
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# XXXXXXXXXXXX_ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b001100000000_00000_001_00000_0010011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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return ".word ".($template | ($rs1 << 15) | ($rd << 7));
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}
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sub aes64ks1i {
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# Encoding for aes64ks1i rd, rs1, rnum instruction on RV64
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# XXXXXXXX_rnum_ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b00110001_0000_00000_001_00000_0010011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rnum = shift;
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return ".word ".($template | ($rnum << 20) | ($rs1 << 15) | ($rd << 7));
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}
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sub aes64ks2 {
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# Encoding for aes64ks2 rd, rs1, rs2 instruction on RV64
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# XXXXXXX_ rs2 _ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b0111111_00000_00000_000_00000_0110011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rs2 = read_reg shift;
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return ".word ".($template | ($rs2 << 20) | ($rs1 << 15) | ($rd << 7));
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}
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sub brev8 {
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# brev8 rd, rs
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my $template = 0b011010000111_00000_101_00000_0010011;
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my $rd = read_reg shift;
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my $rs = read_reg shift;
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return ".word ".($template | ($rs << 15) | ($rd << 7));
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}
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sub clmul {
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# Encoding for clmul rd, rs1, rs2 instruction on RV64
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# XXXXXXX_ rs2 _ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b0000101_00000_00000_001_00000_0110011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rs2 = read_reg shift;
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return ".word ".($template | ($rs2 << 20) | ($rs1 << 15) | ($rd << 7));
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}
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sub clmulh {
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# Encoding for clmulh rd, rs1, rs2 instruction on RV64
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# XXXXXXX_ rs2 _ rs1 _XXX_ rd _XXXXXXX
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my $template = 0b0000101_00000_00000_011_00000_0110011;
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my $rd = read_reg shift;
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my $rs1 = read_reg shift;
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my $rs2 = read_reg shift;
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return ".word ".($template | ($rs2 << 20) | ($rs1 << 15) | ($rd << 7));
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}
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sub rev8 {
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# Encoding for rev8 rd, rs instruction on RV64
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# XXXXXXXXXXXXX_ rs _XXX_ rd _XXXXXXX
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my $template = 0b011010111000_00000_101_00000_0010011;
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my $rd = read_reg shift;
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my $rs = read_reg shift;
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return ".word ".($template | ($rs << 15) | ($rd << 7));
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}
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1;
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