440 lines
14 KiB
C
440 lines
14 KiB
C
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/*
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* Copyright 2011-2023 The OpenSSL Project Authors. All Rights Reserved.
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*
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* Licensed under the Apache License 2.0 (the "License"). You may not use
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* this file except in compliance with the License. You can obtain a copy
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* in the file LICENSE in the source distribution or at
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* https://www.openssl.org/source/license.html
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <openssl/crypto.h>
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#ifdef __APPLE__
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#include <sys/sysctl.h>
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#else
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#include <setjmp.h>
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#include <signal.h>
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#endif
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#include "internal/cryptlib.h"
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#ifdef _WIN32
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#include <windows.h>
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#else
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#include <unistd.h>
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#endif
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#include "arm_arch.h"
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unsigned int OPENSSL_armcap_P = 0;
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unsigned int OPENSSL_arm_midr = 0;
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unsigned int OPENSSL_armv8_rsa_neonized = 0;
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#ifdef _WIN32
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void OPENSSL_cpuid_setup(void)
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{
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OPENSSL_armcap_P |= ARMV7_NEON;
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OPENSSL_armv8_rsa_neonized = 1;
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if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE)) {
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// These are all covered by one call in Windows
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OPENSSL_armcap_P |= ARMV8_AES;
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OPENSSL_armcap_P |= ARMV8_PMULL;
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OPENSSL_armcap_P |= ARMV8_SHA1;
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OPENSSL_armcap_P |= ARMV8_SHA256;
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}
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}
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uint32_t OPENSSL_rdtsc(void)
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{
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return 0;
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}
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#elif __ARM_MAX_ARCH__ < 7
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void OPENSSL_cpuid_setup(void)
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{
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}
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uint32_t OPENSSL_rdtsc(void)
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{
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return 0;
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}
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#else /* !_WIN32 && __ARM_MAX_ARCH__ >= 7 */
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/* 3 ways of handling things here: __APPLE__, getauxval() or SIGILL detect */
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/* First determine if getauxval() is available (OSSL_IMPLEMENT_GETAUXVAL) */
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# if defined(__GNUC__) && __GNUC__>=2
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void OPENSSL_cpuid_setup(void) __attribute__ ((constructor));
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# endif
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# if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
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# if __GLIBC_PREREQ(2, 16)
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# include <sys/auxv.h>
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# define OSSL_IMPLEMENT_GETAUXVAL
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# endif
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# elif defined(__ANDROID_API__)
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/* see https://developer.android.google.cn/ndk/guides/cpu-features */
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# if __ANDROID_API__ >= 18
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# include <sys/auxv.h>
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# define OSSL_IMPLEMENT_GETAUXVAL
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# endif
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# endif
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# if defined(__FreeBSD__)
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# include <sys/param.h>
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# if __FreeBSD_version >= 1200000
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# include <sys/auxv.h>
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# define OSSL_IMPLEMENT_GETAUXVAL
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static unsigned long getauxval(unsigned long key)
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{
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unsigned long val = 0ul;
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if (elf_aux_info((int)key, &val, sizeof(val)) != 0)
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return 0ul;
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return val;
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}
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# endif
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# endif
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/*
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* Android: according to https://developer.android.com/ndk/guides/cpu-features,
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* getauxval is supported starting with API level 18
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*/
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# if defined(__ANDROID__) && defined(__ANDROID_API__) && __ANDROID_API__ >= 18
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# include <sys/auxv.h>
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# define OSSL_IMPLEMENT_GETAUXVAL
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# endif
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/*
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* ARM puts the feature bits for Crypto Extensions in AT_HWCAP2, whereas
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* AArch64 used AT_HWCAP.
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*/
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# ifndef AT_HWCAP
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# define AT_HWCAP 16
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# endif
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# ifndef AT_HWCAP2
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# define AT_HWCAP2 26
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# endif
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# if defined(__arm__) || defined (__arm)
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# define OSSL_HWCAP AT_HWCAP
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# define OSSL_HWCAP_NEON (1 << 12)
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# define OSSL_HWCAP_CE AT_HWCAP2
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# define OSSL_HWCAP_CE_AES (1 << 0)
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# define OSSL_HWCAP_CE_PMULL (1 << 1)
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# define OSSL_HWCAP_CE_SHA1 (1 << 2)
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# define OSSL_HWCAP_CE_SHA256 (1 << 3)
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# elif defined(__aarch64__)
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# define OSSL_HWCAP AT_HWCAP
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# define OSSL_HWCAP_NEON (1 << 1)
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# define OSSL_HWCAP_CE AT_HWCAP
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# define OSSL_HWCAP_CE_AES (1 << 3)
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# define OSSL_HWCAP_CE_PMULL (1 << 4)
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# define OSSL_HWCAP_CE_SHA1 (1 << 5)
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# define OSSL_HWCAP_CE_SHA256 (1 << 6)
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# define OSSL_HWCAP_CPUID (1 << 11)
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# define OSSL_HWCAP_SHA3 (1 << 17)
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# define OSSL_HWCAP_CE_SM3 (1 << 18)
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# define OSSL_HWCAP_CE_SM4 (1 << 19)
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# define OSSL_HWCAP_CE_SHA512 (1 << 21)
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# define OSSL_HWCAP_SVE (1 << 22)
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/* AT_HWCAP2 */
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# define OSSL_HWCAP2 26
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# define OSSL_HWCAP2_SVE2 (1 << 1)
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# define OSSL_HWCAP2_RNG (1 << 16)
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# endif
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uint32_t _armv7_tick(void);
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uint32_t OPENSSL_rdtsc(void)
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{
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if (OPENSSL_armcap_P & ARMV7_TICK)
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return _armv7_tick();
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else
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return 0;
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}
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# ifdef __aarch64__
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size_t OPENSSL_rndr_asm(unsigned char *buf, size_t len);
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size_t OPENSSL_rndrrs_asm(unsigned char *buf, size_t len);
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size_t OPENSSL_rndr_bytes(unsigned char *buf, size_t len);
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size_t OPENSSL_rndrrs_bytes(unsigned char *buf, size_t len);
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static size_t OPENSSL_rndr_wrapper(size_t (*func)(unsigned char *, size_t), unsigned char *buf, size_t len)
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{
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size_t buffer_size = 0;
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int i;
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for (i = 0; i < 8; i++) {
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buffer_size = func(buf, len);
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if (buffer_size == len)
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break;
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usleep(5000); /* 5000 microseconds (5 milliseconds) */
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}
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return buffer_size;
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}
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size_t OPENSSL_rndr_bytes(unsigned char *buf, size_t len)
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{
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return OPENSSL_rndr_wrapper(OPENSSL_rndr_asm, buf, len);
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}
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size_t OPENSSL_rndrrs_bytes(unsigned char *buf, size_t len)
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{
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return OPENSSL_rndr_wrapper(OPENSSL_rndrrs_asm, buf, len);
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}
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# endif
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# if !defined(__APPLE__) && !defined(OSSL_IMPLEMENT_GETAUXVAL)
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static sigset_t all_masked;
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static sigjmp_buf ill_jmp;
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static void ill_handler(int sig)
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{
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siglongjmp(ill_jmp, sig);
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}
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/*
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* Following subroutines could have been inlined, but not all
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* ARM compilers support inline assembler, and we'd then have to
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* worry about the compiler optimising out the detection code...
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*/
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void _armv7_neon_probe(void);
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void _armv8_aes_probe(void);
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void _armv8_sha1_probe(void);
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void _armv8_sha256_probe(void);
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void _armv8_pmull_probe(void);
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# ifdef __aarch64__
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void _armv8_sm3_probe(void);
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void _armv8_sm4_probe(void);
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void _armv8_sha512_probe(void);
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void _armv8_eor3_probe(void);
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void _armv8_sve_probe(void);
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void _armv8_sve2_probe(void);
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void _armv8_rng_probe(void);
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# endif
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# endif /* !__APPLE__ && !OSSL_IMPLEMENT_GETAUXVAL */
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/* We only call _armv8_cpuid_probe() if (OPENSSL_armcap_P & ARMV8_CPUID) != 0 */
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unsigned int _armv8_cpuid_probe(void);
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# if defined(__APPLE__)
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/*
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* Checks the specified integer sysctl, returning `value` if it's 1, otherwise returning 0.
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*/
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static unsigned int sysctl_query(const char *name, unsigned int value)
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{
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unsigned int sys_value = 0;
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size_t len = sizeof(sys_value);
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return (sysctlbyname(name, &sys_value, &len, NULL, 0) == 0 && sys_value == 1) ? value : 0;
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}
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# elif !defined(OSSL_IMPLEMENT_GETAUXVAL)
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/*
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* Calls a provided probe function, which may SIGILL. If it doesn't, return `value`, otherwise return 0.
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*/
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static unsigned int arm_probe_for(void (*probe)(void), volatile unsigned int value)
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{
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if (sigsetjmp(ill_jmp, 1) == 0) {
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probe();
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return value;
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} else {
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/* The probe function gave us SIGILL */
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return 0;
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}
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}
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# endif
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void OPENSSL_cpuid_setup(void)
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{
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const char *e;
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# if !defined(__APPLE__) && !defined(OSSL_IMPLEMENT_GETAUXVAL)
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struct sigaction ill_oact, ill_act;
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sigset_t oset;
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# endif
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static int trigger = 0;
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if (trigger)
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return;
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trigger = 1;
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OPENSSL_armcap_P = 0;
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if ((e = getenv("OPENSSL_armcap"))) {
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OPENSSL_armcap_P = (unsigned int)strtoul(e, NULL, 0);
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return;
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}
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# if defined(__APPLE__)
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# if !defined(__aarch64__)
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/*
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* Capability probing by catching SIGILL appears to be problematic
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* on iOS. But since Apple universe is "monocultural", it's actually
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* possible to simply set pre-defined processor capability mask.
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*/
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if (1) {
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OPENSSL_armcap_P = ARMV7_NEON;
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return;
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}
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# else
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{
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/*
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* From
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* https://github.com/llvm/llvm-project/blob/412237dcd07e5a2afbb1767858262a5f037149a3/llvm/lib/Target/AArch64/AArch64.td#L719
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* all of these have been available on 64-bit Apple Silicon from the
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* beginning (the A7).
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*/
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OPENSSL_armcap_P |= ARMV7_NEON | ARMV8_PMULL | ARMV8_AES | ARMV8_SHA1 | ARMV8_SHA256;
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/* More recent extensions are indicated by sysctls */
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OPENSSL_armcap_P |= sysctl_query("hw.optional.armv8_2_sha512", ARMV8_SHA512);
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OPENSSL_armcap_P |= sysctl_query("hw.optional.armv8_2_sha3", ARMV8_SHA3);
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if (OPENSSL_armcap_P & ARMV8_SHA3) {
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char uarch[64];
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size_t len = sizeof(uarch);
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if ((sysctlbyname("machdep.cpu.brand_string", uarch, &len, NULL, 0) == 0) &&
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((strncmp(uarch, "Apple M1", 8) == 0) ||
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(strncmp(uarch, "Apple M2", 8) == 0))) {
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OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;
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OPENSSL_armcap_P |= ARMV8_HAVE_SHA3_AND_WORTH_USING;
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}
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}
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}
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# endif /* __aarch64__ */
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# elif defined(OSSL_IMPLEMENT_GETAUXVAL)
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if (getauxval(OSSL_HWCAP) & OSSL_HWCAP_NEON) {
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unsigned long hwcap = getauxval(OSSL_HWCAP_CE);
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OPENSSL_armcap_P |= ARMV7_NEON;
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if (hwcap & OSSL_HWCAP_CE_AES)
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OPENSSL_armcap_P |= ARMV8_AES;
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if (hwcap & OSSL_HWCAP_CE_PMULL)
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OPENSSL_armcap_P |= ARMV8_PMULL;
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if (hwcap & OSSL_HWCAP_CE_SHA1)
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OPENSSL_armcap_P |= ARMV8_SHA1;
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if (hwcap & OSSL_HWCAP_CE_SHA256)
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OPENSSL_armcap_P |= ARMV8_SHA256;
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# ifdef __aarch64__
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if (hwcap & OSSL_HWCAP_CE_SM4)
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OPENSSL_armcap_P |= ARMV8_SM4;
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if (hwcap & OSSL_HWCAP_CE_SHA512)
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OPENSSL_armcap_P |= ARMV8_SHA512;
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if (hwcap & OSSL_HWCAP_CPUID)
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OPENSSL_armcap_P |= ARMV8_CPUID;
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if (hwcap & OSSL_HWCAP_CE_SM3)
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OPENSSL_armcap_P |= ARMV8_SM3;
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if (hwcap & OSSL_HWCAP_SHA3)
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OPENSSL_armcap_P |= ARMV8_SHA3;
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# endif
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}
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# ifdef __aarch64__
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if (getauxval(OSSL_HWCAP) & OSSL_HWCAP_SVE)
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OPENSSL_armcap_P |= ARMV8_SVE;
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if (getauxval(OSSL_HWCAP2) & OSSL_HWCAP2_SVE2)
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OPENSSL_armcap_P |= ARMV8_SVE2;
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if (getauxval(OSSL_HWCAP2) & OSSL_HWCAP2_RNG)
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OPENSSL_armcap_P |= ARMV8_RNG;
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# endif
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# else /* !__APPLE__ && !OSSL_IMPLEMENT_GETAUXVAL */
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/* If all else fails, do brute force SIGILL-based feature detection */
|
||
|
|
|
||
|
|
sigfillset(&all_masked);
|
||
|
|
sigdelset(&all_masked, SIGILL);
|
||
|
|
sigdelset(&all_masked, SIGTRAP);
|
||
|
|
sigdelset(&all_masked, SIGFPE);
|
||
|
|
sigdelset(&all_masked, SIGBUS);
|
||
|
|
sigdelset(&all_masked, SIGSEGV);
|
||
|
|
|
||
|
|
memset(&ill_act, 0, sizeof(ill_act));
|
||
|
|
ill_act.sa_handler = ill_handler;
|
||
|
|
ill_act.sa_mask = all_masked;
|
||
|
|
|
||
|
|
sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
|
||
|
|
sigaction(SIGILL, &ill_act, &ill_oact);
|
||
|
|
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv7_neon_probe, ARMV7_NEON);
|
||
|
|
|
||
|
|
if (OPENSSL_armcap_P & ARMV7_NEON) {
|
||
|
|
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_pmull_probe, ARMV8_PMULL | ARMV8_AES);
|
||
|
|
if (!(OPENSSL_armcap_P & ARMV8_AES)) {
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_aes_probe, ARMV8_AES);
|
||
|
|
}
|
||
|
|
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_sha1_probe, ARMV8_SHA1);
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_sha256_probe, ARMV8_SHA256);
|
||
|
|
|
||
|
|
# if defined(__aarch64__)
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_sm3_probe, ARMV8_SM3);
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_sm4_probe, ARMV8_SM4);
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_sha512_probe, ARMV8_SHA512);
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_eor3_probe, ARMV8_SHA3);
|
||
|
|
# endif
|
||
|
|
}
|
||
|
|
# ifdef __aarch64__
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_sve_probe, ARMV8_SVE);
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_sve2_probe, ARMV8_SVE2);
|
||
|
|
OPENSSL_armcap_P |= arm_probe_for(_armv8_rng_probe, ARMV8_RNG);
|
||
|
|
# endif
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Probing for ARMV7_TICK is known to produce unreliable results,
|
||
|
|
* so we only use the feature when the user explicitly enables it
|
||
|
|
* with OPENSSL_armcap.
|
||
|
|
*/
|
||
|
|
|
||
|
|
sigaction(SIGILL, &ill_oact, NULL);
|
||
|
|
sigprocmask(SIG_SETMASK, &oset, NULL);
|
||
|
|
|
||
|
|
# endif /* __APPLE__, OSSL_IMPLEMENT_GETAUXVAL */
|
||
|
|
|
||
|
|
# ifdef __aarch64__
|
||
|
|
if (OPENSSL_armcap_P & ARMV8_CPUID)
|
||
|
|
OPENSSL_arm_midr = _armv8_cpuid_probe();
|
||
|
|
|
||
|
|
if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N1)) &&
|
||
|
|
(OPENSSL_armcap_P & ARMV7_NEON)) {
|
||
|
|
OPENSSL_armv8_rsa_neonized = 1;
|
||
|
|
}
|
||
|
|
if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V1) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N2) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V2)) &&
|
||
|
|
(OPENSSL_armcap_P & ARMV8_SHA3))
|
||
|
|
OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;
|
||
|
|
if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_PRO) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM_PRO) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_MAX) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM_MAX) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_PRO) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_PRO) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX) ||
|
||
|
|
MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX)) &&
|
||
|
|
(OPENSSL_armcap_P & ARMV8_SHA3))
|
||
|
|
OPENSSL_armcap_P |= ARMV8_HAVE_SHA3_AND_WORTH_USING;
|
||
|
|
# endif
|
||
|
|
}
|
||
|
|
#endif /* _WIN32, __ARM_MAX_ARCH__ >= 7 */
|